Card Set Information
CSIS 2810 Midterm terms
The transistor count on an IC will double every 18 to 24 months.
The performance enhancement is limited to the amount that the improvement is used.
A broad scope term used in describing the overall ability for a computer to exicute a program.
Or, Performance = 1 / Execution time
The frequency that the processor runs at
Cycles per instruction
CPI = CPU Clock cycles / Instruction count
The process of positioning a read/write head over the pproper track on a disk.
Concentric circles that makes up the surface of a magnetic disk
Segments that make up a track on a magnetic disk.
Something you put shrimp salads on.
The time it takes for the read/write head to locate the proper sector within a track.
The processor continually checks the I/O device to determine if the I/O device has a request for the CPU.
An Interrupt driven I/O sends an interrupt flag to the CPU to tell the CPU that it has a request of services from the CPU. This eliminates the need for the CPU to continually poll the devices.
Direct Memory Access. (DMA)
DMA is a process where a DMA controller provides the ability to transfer data to and from the memory without putting a load on the processor.
RAID 0 is used simply for speed but has no redundancy.
RAID 1 uses mirroring to make a duplicate of the hard drive on another. Used for redundancy.
RAID 2: uses error detection and correction.
RAID 3: Uses a parity check on an additional drive to rebuild any failures.
RAID 4: Uses block parity similar to RAID 3.
RAID 5 (JBOD) A combination of RAID 0 and RAID 3. It has the speed of RAID 0 bit with parity redundancy of RAID 3. Hard disks can be of any size as parity blocks can be located on any disk.
RAID 6: Multiple check blocks are in place for failure detection.
The minimum unit of information that either can or can’t be present in a cache.
Requested data located in some block in the upper level.
located in some block in the upper level.
A term for the natural unit of data used by a particular processor design. Usually a fixed bit size. 32-bit for mips.
Part of a memory address in a block.
A field in a table that used to identify whether
the associated block in the hierarchy corresponds to a requested word.
A scheme designed for consistency where data is always written to both the main memory and the cache.
A write-back handles writes by updating values only to the block in the cache, then writing the modified block to the lower level of the hierarchy when the block is replaced.
A virtual memory block.
The table containing the virtual to physical address translations in a virtual memory system.
A cache that keeps track of reciently used address mappings to try to avoid an access to the page table.
A miss on the block is a page fault.
A virtual address is a location in virtual memory which is translated by hardware and software into a physical address.
The physical address can be used to access the memory.