CO527 Operating Systems and Architecture

Card Set Information

Author:
ianholden
ID:
214478
Filename:
CO527 Operating Systems and Architecture
Updated:
2013-05-06 12:14:06
Tags:
Operating Systems Architecture
Folders:

Description:
Revision cards for CO527 Operating Systems and Architecture
Show Answers:

Home > Flashcards > Print Preview

The flashcards below were created by user ianholden on FreezingBlue Flashcards. What would you like to do?


  1. What does RISC stand for?
    Reduced Instruction Set Computing
  2. What does CISC stand for?
    Complex Instruction Set Computing
  3. What does VLIC stand for?
    Very Long Instruction Word Architecture
  4. Give some properties of a RISC chip?
    • Programs tend to be larger because it may take more instructions to execute a task.
    • Execution time is faster due to hardware simplicity
    • Low power consumption
    • Low cost
  5. Give some properties of a CISC chip?
    • Programs tend to be smaller because it may take less time to execute a task.
    • Execution time is slower due to hardware complexity.
    • High power consumption.
    • High cost. (Except when bought in volume)
  6. Give some properties of VLIW chips?
    • Wide instruction codes.
    • Complex hardware
    • High power consumption
    • Very specialised and expensive
  7. Describe the instruction format for a RISC instruction
    | Operation | Source | Destination | Other |

    Fixed number of bits for each field
  8. Describe the instruction format for a CISC instruction
    | Complex Operation | Operand Fields |

    Number of bits variant, depending on operation
  9. Describe the instruction format for a VLIW instruction
    | Operation 1 | Operation 2 | Operation 3 |

    Operations are RISC-like instructions
  10. What type of processor is MIPS?

    A) RISC
    B) VLIW
    C) CISC
    A) RISC
    (this multiple choice question has been scrambled)
  11. How many bits wide are all instruction and data words in a MIPS processor?
    32-bits wide
  12. Describe a Harvard Architecture
    • Simultaneous read/write 
    • Separate program & data memories
  13. Why do memory bottlenecks occur?
    Because external memory (RAM etc...) is slower than internal memory (CPU).
  14. How does MIPS combat memory bottlenecking?
    It uses internal registers as part of its processing architecture.
  15. How many internal registers are there available in a MIPS processor?
    32 internal registers
  16. To save memory, where does MIPS store recently used values?
    In a register file
  17. Name the three instruction families that exist in a MIPS processor.
    • Register-to-Register
    • Load/Store
    • Branch
  18. Here is the structure of a Register-to-Register instruction:

    |   op   |   rs   |   rt   |   rd   | shamt | funct |
    | 6bits  | 5bits| 5bits | 5bits| 5bits   | 6bits |

    What does the op field represent?
    Type of operation (instruction family)
  19. Here is the structure of a Register-to-Register instruction:

    |   op   |   rs   |   rt   |   rd   | shamt | funct |
    | 6bits  | 5bits| 5bits | 5bits| 5bits   | 6bits |

    What does the rs field represent?
    First source operand (register address)
  20. Here is the structure of a Register-to-Register instruction:

    |   op   |   rs   |   rt   |   rd   | shamt | funct |
    | 6bits  | 5bits| 5bits | 5bits| 5bits   | 6bits |

    What does the rt field represent?
    Second source operand (register address)
  21. Here is the structure of a Register-to-Register instruction:

    |   op   |   rs   |   rt   |   rd   | shamt | funct |
    | 6bits  | 5bits| 5bits | 5bits| 5bits   | 6bits |

    What does the rd field represent?
    Destination register address
  22. Here is the structure of a Register-to-Register instruction:

    |   op   |   rs   |   rt   |   rd   | shamt | funct |
    | 6bits  | 5bits| 5bits | 5bits| 5bits   | 6bits |

    What does the shamt field represent?
    Shift amount
  23. Here is the structure of a Register-to-Register instruction:

    |   op   |   rs   |   rt   |   rd   | shamt | funct |
    | 6bits  | 5bits| 5bits | 5bits| 5bits   | 6bits |

    What does the funct field represent?
    ALU function to be performed on operands
  24. How many outputs does the register file have?
    2 (it is dual port)
  25. In a register-to-register instruction, what six-bit opcode is the instruction always fixed to?
    000000
  26. Register 0 of the MIPS processor has a fixed value of...
    0
  27. What does the ALU do in a MIPS processor?
    • Performs the ALUoperation on two, 32-bit source inputs, input1 and input2. 
    • It produces one 32-bit result, ALUresult, as well as a flag, Zeroresult, to indicate when the result is equivalent to zero.
  28. What part of the Register-to-register instruction is the ALUoperation extracted from?
    Funct
  29. When we want to use a STORE instruction, we want to move data from...

    a) Data Memory to Register File
    b) Register File to Data Memory
    b) Register File to Data Memory
  30. When we want to use a LOAD instruction, we want to move data from...

    a) Data Memory to Register File
    b) Register File to Data Memory
    a) Data Memory to Register File
  31. In the Data Memory, when a write instruction has been executed, what single-bit control signal path is used?
    memwrite
  32. In the Data Memory, when a read instruction has been executed, what single-bit control signal path is used?
    memread
  33. Here is the structure of a LOAD instruction:

    |op        |rs        |rt        |     offset      |
    |6bits    |5bits    |5bits   |     16bits      |

    What does each header declare?
    • op - Type of operation
    • rs - Base Register
    • rt - Destination Register
    • offset - Address offset
  34. In a LOAD instruction, what must you do to the offset field to work out the effective address?
    • Turn it from 16-bit into a 32-bit address.
    • Add this value to the base address.
  35. How can we convert a positive binary number to its negative two's complements notation in two steps?
    • Invert the original binary number
    • Add 1
  36. As the Opcode part of an instruction, what instruction types do the following binary values represent?

    000000
    100011
    101011
    000100
    000101
    000111
    • 000000 = Register to register instruction
    • 100011 = LOAD instruction
    • 101011 = STORE instruction
    • 000100 = Branch if equal
    • 000101 = Branch if not equal
    • 000111 = Branch if greater than zero
  37. How do we convert a 16-bit value to a 32-bit value?
    • If 16-bit number is negative, append 16 1's to the left of the number
    • If 16-bit number is positive, append 16 0's to the left of the number
  38. In a MIPS processor, where does the conversion from a 16-bit number to a 32-bit number happen?
    At the Sign Extension Unit.


  39. What is the purpose of Multiplexor A?
    'A' selects which field is used to control the WriteReg address.

    - Mux control = 0 for LD, 1 for RR


  40. What is the purpose of Multiplexor B?
    'B' selects the lower second input of the ALU. It sends either the register value or address offset.

    - Mux control = 0 for RR, 1 for LOAD/STORE


  41. What is the purpose of multiplexor C?
    'C' selects memory or ALU output to feed back to the register file WriteData.

    - Mux control = 0 for RR, 1 for LOAD
  42. Where are the MIPS instructions stored?
    Program memory
  43. MIPS instructions are 32 bits wide but are addressed as...
    bytes (8-bits).
  44. The program counter is automatically incremented by ....?.... every clock cycle. [Fill in the blank]
    4
  45. Out of the three instructions types for a MIPS processor, what two share the same instruction format?
    LOAD/STORE & Branch

    • |   op   |   rs   |   rt   |   offset   |
    • | 6bits | 5bits | 5bits |  16bits   |
  46. To test for equality in a branch statement, what happens in the ALU?
    The two variables are subtracted. If the zero flag is set ( = 1) then they are equal else zero flag is not set ( = 0) meaning they are not equal.
  47. What is an operating system?
    the machine-managing code that provides an environment for applications
  48. What is a process control system?
    • The computer controls industrial or experimental processes. 
    • Real time constraints
  49. What is a Single-user system?
    • May provide just one virtual machine, for one user.
    • Some can provide multiple Virtual Machines, (e.g, Windows 95/98/.../Vista/7), these can perform concurrent tasks.
  50. When a computer wants to run another application but has run out of space in memory to store it, it temporarily places idle/unused application memory into the.......

    A) Swap-File
    B) Virtual Memory Register
    C) Translation Lookaside Buffer
    D) Memory Address Register
    A) Swap-File
    (this multiple choice question has been scrambled)
  51. What does paging do?
    Provides a virtual machine that can be larger than the real machine
  52. What are Page frames?
    Areas of Real memory divided into equal size
  53. What are pages?
    Areas of virtual memory divided into equal size
  54. What does the page table do?
    Contains one entry for each page of virtual memory, which provides the mapping for that page:

    • to a page frame,
    • to a location in Swap Space (swap file)
    • or to something else (e.g, a new page)
  55. What two things make up a virtual address?
    • Page number
    • Offset
  56. How does segmentation differ from paging?
    Virtual memory is divided into different sized segments instead of being equally sized pages.
  57. What is a Translation Lookaside Buffer?
    It is a cache for recently used Page Table Entries.
  58. What is the purpose of a virtual machine?
    The purpose of a virtual machine is to provide an abstraction of the real machine.

What would you like to do?

Home > Flashcards > Print Preview