# Comp Org test 1

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1. Name and explain the main components of a von Neumann computer.
• Central Processing Unit:
• Consists of a control unit, ALU, registers and PC
• Main-memory system:
• For program instruction and data storage
• I/O system:
• For input and output

Single data path between main memory and control unit of CPU for data and in-struction transfer
2. How many megabytes (MB) are in 2 terabytes (TB)? Show your work. Hint: use powers of 2.
(2 terabytes )(240 bytes/terabyte)(megabyte/220 bytes )= 221 megabytes
3. Is it possible for both Moore's Law and Rock's Law to continue to hold indefinite ly?  Explain your answer.
No

The current version of Moore's Law is usually conveyed as: "the density of silicon chips doubles every 18 months."

Rock's Law states: "The cost of capital equipment to build semiconductors will double every four years."

At this rate, by the year 2035, not only will the size of a memory element be smaller than an atom, but it would also require the entire wealth of the world to build a single chip.
4. Convert 39.812510 to base 4 using any method discussed in class. Show all work
• 39 / 4 = 9       R = 3
• 9 / 4 = 2         R = 1
• 2 / 4 = 0         R = 2
• 0.8125 x 4 = 3.2500
• 0.2500 x 4 = 1.0000
• 39.812510 = 213.314
5. Assuming two's complement 8-bit representation, consider the following:
0 1 1 0 0 1 1 0
+ 0 1 1 1 0 1 1 0
1 1 0 1 1 1 0 0

Is the result correct (i.e., does the resulting number accurately represent the sum of the two values which are being added together)? Justify your answer.
The computation is carried out correctly, but the result is incorrect since carry-in to the sign bit is not equal to carry-out. Overflow has occurred.
6. Show how -0.2856445312510 = -.010010010012  would be stored using IEEE-754 single precision (be sure to indicate the sign bit, the exponent, and the signi cand elds).
-0.2856445312510 = -.010010010012 = -1.0010010012 x 2-2

• Sign = 1
• Exponent = -2 + 127 = 12510 = 011111012
• Signifi cand = 001001001000000000000000

The result: 1 01111101 001001001000000000000000
7. Assume we are using 8-bit two's complement representation. Use arithmetic shifting to multiply the value 00010100 by 4.
• Multiply by 2:
• 00101000

• Multiply by 4:
• 01010000
8. How many inputs does a decoder have if it has 128 outputs?
128 = 27 = 7
9. Identify whether each of the following is based on combinational logic or sequential logic

(a) [2 points] D flip-flop

(c) [2 points] Multiplexer

(d) [2 points] Memory

(e) [2 points] A digital circuit to implement F(x, y, z) =  ~x~y + x * (y + ~z)
• a) Sequential
• b) Combinational
• c) Combinational
• d) Sequential
• e) Combinational
10. Consider the following characteristic table for a TM flip-flop:

T | M | Q(t + 1)
0 |  0 |   0
0 |  1 | Q(t)
1 |  0 | ~Q(t)
1 |  1 | Q(t)

We wish to show that a JK flip-flop can be converted to an TM flip-flop by adding gate(s) and inverter(s).

(a) [10 points] Construct a truth table which shows the required values of J and K for each possible T and M combination.

(b) [10 points] Write a Boolean expression in sum-of-products form for J. Write a Boolean expression in sum-of-products form for K.

(c) Draw the resulting circuit using only NAND gates and one JK flip-flop.If you choose to simplify the function for J or K you must justify your simpli fication.(For partial credit you may implement the resulting circuit using one JK flip-flop and any gate discussed in lecture.)
• a)
• T | M | Q(t + 1) || J | K
• 0 | 0  |     0       || 0 | 1
• 0 | 1  | Q(t)       || 0 | 0
• 1 | 0  | ~Q(t)       || 1 | 1
• 1 | 1  | Q(t)       || 0 | 0

b)

• J = T * ~M
• K = ~T* ~M + T ~M

• c)
• Simpli fication of the expression for K:
• K = ~T ~M + T ~M
•    = ~M (~T + T)     ->  Distributivity
•    = ~M (1) B          ->  Complement
•    = ~M                  -> Identity
• Final circuit not drawn
 Author: cjcStudygroup ID: 216440 Card Set: Comp Org test 1 Updated: 2013-04-29 15:46:22 Tags: Comporg final test Folders: Description: final questions from test 1 Show Answers: