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What happens if both J and K are set to J = K = 1
If J and K are left high the FF is in toggle mode and will change states at each PGT of the clock.
The J&K inputs cannot cause the FF to change states.
What does a circle represent on the input of a clock signal?
NGT instead of a PGT.
The clock has a direct effect on the state of the FF
Asych inputs operate independently of synch and can be used to set the FF high (PRESET) or low (CLEAR) at any given time. They are Override Inputs.
When the wave goes high.
When the wave goes low.
Rise time (Tr)?
Time it takes to go from low to a high state.
Fall time (Tf)?
Time it takes to go from high to a low state.
Rise and fall times are defined as?
The time it takes the voltage to change between 10% and 90%
What is the transition at the beginning of the pulse?
What is the transition at the end of the pulse?
What is duration width (Tw)?
The point when the leading and trailing edge is at 50% of the high level.
Setup time (Ts)?
The time interval immediately preceeding the transistion of the clock. Such as setting the J pin high so that the clock will trigger it.
Hold time (Th)?
The time interval immediately following the active transistion of the clock.
The FF is acrivated by a signal transition. A small triangle at the clock input indicated that it is edge triggered instead of level triggered like latches.
Triangle on clock input?
Indicates that the FF is edge triggered.
A delay between the time the clock switches and the FF switches. This is a problem for FF in series or serial.
The number of states in a counting sequence
A MOD-Nth. is the amount of States in a counter. 2^3 has three FF and is a MOD-8
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